This project focuses on the problem of automating the definition of new memory fault models using layout and electrical simulations.
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Defect Based Testing and Diagnosis of Sram Memories
- April 10, 2012
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This project focuses on the problem of automating the definition of new memory fault models using layout and electrical simulations.
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Development of a unified design methodology for the memory elements of sparse logic in a complex circuit combining fault tolerance techniques, on-line test and off-line test
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Mutant Hardware/software Components for Dynamically Reconfigurable Distributed Systems
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Design of testable and reconfigurable digital cores.
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Coordinate and focus a wide range of disciplinary competences in the field of wideband wireless communications, to foster cooperation with the related industries, and to promote high-level permanent education.
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Coordinate and focus a wide range of disciplinary competences in the field of wideband wireless communications, to foster cooperation with the related industries, and to promote high-level permanent education.
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The purpose of the project is to create methodologies and tools to increase the dependability of digital systems.
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Definition of methodologies and tools for the static characterization of a hardware/software microprocessor based system.
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FARM (Fault tolerant ARM) research and demonstrate solutions for the design of System on Chip ICs that tolerate soft errors by developing circuit and software designs to recognise and correct for faults during operation.
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European Network for Initial and Continuing Education in VLSI/SoC Testing Using Remote Ate Facilities.
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