APROPOS) project is hiring 15 international “Early Stage Researchers” for PhD positions in Europe (Finland, Sweden, Netherlands, Austria, Switzerland, Italy, France, Spain, and UK) with 36-month fully-funded contracts.
Read More
APROPOS) project is hiring 15 international “Early Stage Researchers” for PhD positions in Europe (Finland, Sweden, Netherlands, Austria, Switzerland, Italy, France, Spain, and UK) with 36-month fully-funded contracts.
Read MoreTestGroup team is attending HiPEAC Computing Systems Week 2019 in Bilbao (Spain). Interesting technical discussions and presentations, lot of friends and colleagues, all organized in a beautiful landscape.
Read MoreGood news for our research group !!!!
The article “Probabilistic estimation of the application-level impact of precision scaling in approximate computing applications” has been published on the Microelectronics Reliability Journal and is now available online”.
Read MoreOn behalf of the DFT19 Program Committee, we are delighted to inform you that your paper “Combining Cluster Sampling and ACE analysis to improve fault-injection based reliability evaluation of GPU-based systems” has been ACCEPTED for ORAL presentation at the 32th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems.
Read MoreToday at 5:15PM I’m going to give an invited talk at the 25th IEEE International Symposium on On-Line Testing and Robust System Design in Kazan in Rhodes (Greece).
The topic of the talk will be “Bayesian Models For Early Cross-Layer Reliability Analysis and Design Space Exploration” and will be part of Session 5S “Cost-Effective Resilience: Advanced Cross-Layer Analysis and Optimization Techniques” organized by Prof. M. Shafique (TU Wien).
Read MoreAfter more than 1 year from its end, the FP7 Clereco project (http://www.clereco.eu) still produces results in the field of cross-layer reliability analysis.
This paper that has been accepted for publication in an upcoming issue of IEEE Transactions on Computers proposes a framework for Early System Reliability Analysis for Cross-layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems.
Read MoreToday I’m going to give a keynote talk at the 16th IEEE EAST-WEST DESIGN & TEST SYMPOSIUM in Kazan (Russia).
The topic of the talk will be “Cross Layer Reliability: a Reality or a PromiseNever Coming True?”.
Read MoreDr. Alessandro Vallero from TestGroup presented our latest study on “Multi-faceted Microarchitecture Level Reliability Characterization for NVIDIA and AMD GPUs” @ 2018 IEEE VLSI Test Symposium, San Francisco, CA, USA (April 22-25, 2018).
Read MoreTestGroup team is attending IOLTS 2018 in Platja D’Aro (Spain). Interesting technical discussions and presentations, lot of friends and colleagues, all organized in a beautiful landscape …
Read MoreOur Ph.D. student Alberto Carelli is going to give a presentation on “Securing bitstream integrity, confidentiality and authenticity in reconfigurable mobile heterogeneous systems” today at the IEEE International Conference on Automation, Quality and Testing, Robotics 2018 – AQTR’18
Read More