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On May 30 Alessandro VALLERO will discuss his PhD thesis, titled ” Cross layer reliability estimation for digital systems”

The 22nd IEEE European Test Symposium will start in a few days in Limassol (Cyprus).

Testgroup will be there with two interesting presentations.

We are happy to announce that HiPEACinfo vol. 50 is now available for download from the HiPEAC website (https://www.hipeac.net/assets/public/publications/newsletter/hipeacinfo50.pdf). It contains an nice overview of the Clereco results. If you have a LinkedIn account, please consider posting about your article and sharing the link to the magazine via LinkedIn.      

New paper titled “SIFI a reliability evaluation framework for soft-errors built on top of Multi2Sim” accepted for publication at the 23rd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS’17), July 3-5, 2017 in Thessaloniki, Greece.

New paper titled “RT Level vs. Microarchitecture Level Reliability Assessment: Case Study on ARM Cortex-A9 CPU” accepted for publication at the 47th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2017), June 26-29, 2017 in Denver, CO (USA).

On April 24th my Ph.D. student Alessandro Vallero will attend ISPASS 2017 in Santa Rosa, CA to present our latest paper: Microarchitecture Level Reliability Comparison of Modern GPU Designs: first findings..

On Wednesday December 14, at the second floor of the Department of Control and Computer Engineering (DAUIN), Ph.D. students at the end of their studies (XXIX cycle) had the chance to present and discuss their research activities. The event has been an opportunity to illustrate the Ph.D. program in Computer and Control Engineering and to disseminate the research activities carried on at DAUIN.
My student Alessandro Vallero presented his Ph.D. work on “Reliability analysis of future digital systems “.

The FP7-CLERECO project will present on Thursday (Nov. 24th, 2016) its latest results and tools in a special session on “Cross-layer Reliability Assessment” at the XXXI Design of Circuits and Integrated Systems Conference – DCIS’16 (Granada, Spain). If you plan to attend DCIS don’t miss the session.